Assorded entry.S changes, gaining us 2.4% improvement.  This basically
moves functionality out of EmulateAll() and does it in assembly instead.
I might have missed something, but the differences appear to be:
- irq's enabled immediately
- do condition codes check right here
- restore cpsr settings explicitly on exit

PATCH FOLLOWS
KernelVersion: 2.4.19-rmk6

diff -uNr linux-2.4.19-rmk6/arch/arm/nwfpe-rfs7/entry.S linux-2.4.19-rmk6/arch/arm/nwfpe-rfs8/entry.S
--- linux-2.4.19-rmk6/arch/arm/nwfpe-rfs7/entry.S	Sat Mar 15 13:27:28 2003
+++ linux-2.4.19-rmk6/arch/arm/nwfpe-rfs8/entry.S	Sat Mar 15 14:51:09 2003
@@ -73,42 +73,58 @@
 
 	.globl	nwfpe_enter
 nwfpe_enter:
-        mov r4, lr			@ save the failure-return addresses
-	str sp, [r10, #116]		@ save pointer to user regs
-	ldr ip, [r10, #112]		@ get init_flag
-
-        ldr r5, [sp, #60]	 	@ get contents of PC;
-	cmp ip, #0
-	bleq nwfpe_init_fpa
-	sub r8, r5, #4
-.Lx1:	ldrt r0, [r8]			@ get actual instruction into r0
-emulate:
-	bl EmulateAll			@ emulate the instruction
-   	cmp r0, #0			@ was emulation successful
-        moveq pc, r4			@ no, return failure
+	/* ?? Could put userRegisters and fpa11 into fixed regs during
+	   emulation.  This would reduce load/store overhead at the expense
+	   of stealing two regs from the register allocator.  Not sure if
+	   it's worth it.  */
+	mrs	r7, cpsr		@ enable irqs
+	bic	ip, r7, #0x80
+	msr	cpsr_c, ip
+        str	sp, [r10, #116]		@ save pointer to user regs
+	ldr	ip, [r10, #112]		@ get init_flag
+        mov	r4, sp			@ use r4 for local pointer
+        mov	r10, lr			@ save the failure-return addresses
+	ldr	r6, =nwfpe_aCC
+
+        ldr	r5, [r4, #60]	 	@ get user PC
+	cmp	ip, #0
+	bleq	nwfpe_init_fpa
+	sub	r8, r5, #4
+.Lx1:	ldrt	r0, [r8]		@ get actual instruction into r0
+	bl	EmulateAll		@ emulate the instruction
+ret_from_emulate:
+   	cmp	r0, #0			@ was emulation successful
+	beq	failed
 
 next:
-.Lx2:	ldrt r6, [r5], #4		@ get the next instruction and
+.Lx2:	ldrt	r0, [r5], #4		@ get the next instruction and
 					@ increment PC
+        ldr 	r1, [r4, #64]		@ fetch the condition codes
 
-	and   r2, r6, #0x0F000000	@ test for FP insns
-        teq   r2, #0x0C000000
-        teqne r2, #0x0D000000
-        teqne r2, #0x0E000000
-        movne pc, r9			@ return ok if not a fp insn
-
-        str r5, [sp, #60]		@ update PC copy in regs
-
-        mov r0, r6			@ save a copy
-        ldr r1, [sp, #64]		@ fetch the condition codes
-   	bl  checkCondition		@ check the condition
-   	cmp r0, #0			@ r0 = 0 ==> condition failed
+	and   	r2, r0, #0x0F000000	@ test for FP insns
+        teq  	r2, #0x0C000000
+        teqne 	r2, #0x0D000000
+        teqne 	r2, #0x0E000000
+	msrne 	cpsr_c, r7
+        movne 	pc, r9			@ return ok if not a fp insn
+
+        str 	r5, [r4, #60]		@ update PC copy in regs
+
+	mov	r1, r1, lsr #28		@ check predicate against CC
+	mov	ip, r0, lsr #28
+	mov	ip, ip, lsl #2
+	ldr	ip, [r6, ip]
+	mov	ip, ip, lsr r1
+	tst	ip, #1
 
-        @ if condition code failed to match, next insn
-   	beq next			@ get the next instruction;
+	adrne	lr, ret_from_emulate	@ condition passed, emulate it
+   	bne	EmulateAll
+
+   	b 	next			@ get the next instruction
    	    
-        mov r0, r6			@ prepare for EmulateAll()
-   	b emulate			@ if r0 != 0, goto EmulateAll
+failed:
+	msr 	cpsr_c, r7
+        mov 	pc, r10			@ no, return failure
 
 	@ We need to be prepared for the instructions at .Lx1 and .Lx2 
 	@ to fault.  Emit the appropriate exception gunk to fix things up.
@@ -116,7 +132,8 @@
 	@ plain LDR instruction.  Weird, but it seems harmless.
 	.section .fixup,"ax"
 	.align	2
-.Lfix:	mov	pc, r9			@ let the user eat segfaults
+.Lfix:	msr	cpsr_c, r7
+	mov	pc, r9			@ let the user eat segfaults
 	.previous
 
 	.section __ex_table,"a"
diff -uNr linux-2.4.19-rmk6/arch/arm/nwfpe-rfs7/fpopcode.c linux-2.4.19-rmk6/arch/arm/nwfpe-rfs8/fpopcode.c
--- linux-2.4.19-rmk6/arch/arm/nwfpe-rfs7/fpopcode.c	Sat Mar 15 13:02:01 2003
+++ linux-2.4.19-rmk6/arch/arm/nwfpe-rfs8/fpopcode.c	Sat Mar 15 15:01:14 2003
@@ -64,7 +64,7 @@
 /* condition code lookup table
  index into the table is test code: EQ, NE, ... LT, GT, AL, NV
  bit position in short is condition code: NZCV */
-static const unsigned short aCC[16] = {
+const unsigned long nwfpe_aCC[16] = {
 	0xF0F0,			// EQ == Z set
 	0x0F0F,			// NE
 	0xCCCC,			// CS == C set
@@ -85,5 +85,5 @@
 
 unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes)
 {
-	return (aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
+	return (nwfpe_aCC[opcode >> 28] >> (ccodes >> 28)) & 1;
 }
